AMD EPYC 9006 Results Are Here and AMD Delivers a Knockout Part Deux

Zen 6 vs. Zen 6c: By the Numbers

Finally, before we move on to a look at the bigger picture with AMD’s SoC and IOD changes for Zen 6, here is a more detailed look at the ever-shrinking differences between AMD’s big and compact cores in this generation.

As noted earlier, AMD has greatly expanded the L3 cache size on their compact chiplets, and as a result the Zen 6c CCD now has 4MB of L3 cache per CPU core, matching both the amount of cache on big Zen 5 and big Zen 6 CCDs. Other than core counts and die size, the only significant difference between the two CCDs is their maximum design frequency – and even that is shrinking.

For the compact Zen 6c CCD, the maximum frequency is now 4.1GHz, up from 3.7GHz in the previous generation. A big emphasis in this generation has been making the Zen 6c cores even more useful to a larger number of customers, and getting clockspeeds up there is one big way to help them.

Meanwhile AMD’s big Zen 6 CCD is also getting a clockspeed boost – which actually comes as a bit of a surprise following AMD’s initial Venice SKU announcement, which had the chips topping out at just 5.0GHz, the same frequency as Turin (Zen 5). Instead, AMD is going to be able to push those CCDs to 5.3GHz, netting a 300MHz (6%) clockspeed bump for the fastest parts on top of the 20% IPC improvement.

As previously revealed by AMD, the number of CPU cores in each CCD/CCX is also being increased in this generation. Each CCD is still comprised of a single CCX. In turn, the size of a CCX for big Zen 6 has gone from 8 cores to 12, with a matching L3 cache size increase. Meanwhile AMD has swung even harder for the dense Zen 6c CCD; those dies are going from 16 CPU cores to 32, blowing well past AMD’s previous cap on the number of cores within a CCX.

Ultimately, with AMD shifting the overall design of their server chips from 16 CCDs per chip to 8 CCDs per chip, the number of CPU cores in each CCD has been adjusted accordingly. At less than half as many CPU cores as a Zen 6c CCD, big Zen 6 is now a bit on the small side in both core count and in die size. But it makes up for that with its frequency versus Zen 6c, which is why it is still AMD’s premier CCD for the highest per-thread performance and/or the lowest latency.

Visions of Even Greater Agnetics

Finally, in a potential nod towards what might be coming next for AMD’s Zen microarchitecture, even with all of the improvements that AMD’s architecture team has been able to make to Zen 6, the one thing that they were not able to react to quite in time is agentic workloads. While Venice is expected to deliver a massive uplift in performance in agentic workloads, thanks in part to the ability to get 256 CPU cores in a single chip, AMD’s architecture team was up-front in noting that they did not have the foresight to see that agentic workloads would become so important when they started on the Zen 6 microarchitecture early this decade.

So while AMD is not making any promises or announcements here, there is certainly a subtext to our discussion of “what could have been.” As a result, we would not be surprised to see some more agentic-focused improvements in the Zen 7 microarchitecture, when AMD will have had a full development cycle to react to the changes in data center computing.