Xilinx Virtex UltraScale Plus VU19P is a Big FPGA

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Virtex UltraScale Plus VU19P
Virtex UltraScale Plus VU19P

The Xilinx Virtex UltraScale+ VU19P is a big FPGA. That may be an understatement. This is a 35 billion transistor device. Of course, this now looks small in comparison to the Cerebras Wafer Scale Engine AI chip it is still huge for a FPGA or traditional chip. With this huge chip, Xilinx has a prime market in mind, chip designers. For anyone wondering, I found one of these chips at a local winery and managed to snap a photo of it for our cover image.

Xilinx Virtex UltraScale+ VU19P

The Xilinx Virtex UltraScale+ VU19P is still built on the company’s 16nm process. It includes 9 million logic cells, 1.5Tbps of DDR4 bandwidth, and up to 4.5Tbps of transceiver bandwidth.

One of the big markets for such an enormous FPGA is simple to imagine: the budding chip design industry. FPGAs have long been a way to prototype chips before taping them out in an expensive process. With traditional Arm devices along with RISC-V and now even Power 9 being available to designers, one can start with core IP and place it on FPGAs to test devices before going to the fab. Having an enormous FPGA allows these teams to prototype higher core count and more complex devices leading to cost and time savings.

There are other industries such as the test and measurement spaces that can also use the bigger FPGA for some applications, but we see chip designers as an easy target for these.

Xilinx Virtex UltraScale+ VU19P Availability

One of the stranger things if you are coming from the CPU or GPU side to FPGAs is that the period between announce and availability is long. We were told the Xilinx Virtex UltraScale+ VU19P will not hit GA for a year if it stays on schedule. That is important since by then Xilinx should have more of its newer 7nm Versal FPGAs out. The company said it is already shipping 7nm Xilinx Versal ACAP products to customers in its early access program. The new 7nm Xilinx Versal ACAPs bring both a massive process shrink along with new capabilities such as the AI Core for AI inferencing.

Overall, this is a big chip, and one that segments will want. At the same time, it is a long time before the product I held this week will hit general availability.

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Patrick has been running STH since 2009 and covers a wide variety of SME, SMB, and SOHO IT topics. Patrick is a consultant in the technology industry and has worked with numerous large hardware and storage vendors in the Silicon Valley. The goal of STH is simply to help users find some information about server, storage and networking, building blocks. If you have any helpful information please feel free to post on the forums.

5 COMMENTS

  1. Just take cheap pci-e FPGA card with gbit lan. Thats it.
    But You need real idea/purpose to make smth workable from it.

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