Intel today disclosed more on its network processor roadmap. Specifically, the Intel IPU (Infrastructure Processing Unit) aims to be an infrastructure processor. If IPU sounds confusing, that may be because it has a confusingly similar name to the Graphcore IPU and the Mellanox IPU line. Intel also previously used IPU as its Imaging Processing Unit. While the company is not producing DPUs like the rest of the industry, it has exotic solutions for hyper-scalers.
Intel IPU Exotic Answer to the Industry DPU
Data centers are moving toward separating the infrastructure and the application levels. Indeed, AWS has been doing this for years, as have other hyper-scalers such as Microsoft. Effectively, an infrastructure operator will use the network fabric to deliver scale-out resources to potentially untrusted third parties running applications in the data center in a composable manner. Here we can see Intel (in a great slide) showing CPUs, GPUs, storage, AI/ ML processors, and other XPU accelerators attached to its IPU and then made available over the network fabric.
In terms of what Intel’s vision for this product involves, the company sees networking, acceleration, and a processor and/or FPGA involved.
We know Intel has been active in the hyper-scale space with this. One example is the Inventec FPGA SmartNIC C5020X which combined a Stratix 10 and a Xeon D-1612 onto a single card.
At this point, one may be wondering why the slide above uses SmartNIC, yet it is clearly a custom solution for a customer. Also, for devices that sit in this segment of the market, the overall market (NVIDIA/Mellanox, Marvell, Broadcom, Pensando, Fungible, VMware, and so forth) including Pat Gelsinger Intel’s CEO in his previous role at VMware, use DPU. There are certainly many terms which is why we created the STH NIC Continuum Framework.
We do not have Intel’s exact implementation details from today’s IPU disclosure, but we generally put FPGA-based NICs in the “Exotic” category. FPGA solutions generally have flexibility but require customer-specific teams to extract value while DPUs are being marketed more generally. If you want to learn more about the differences, aside from the article above, we have a video showing actual DPU devices.
We have been foreshadowing the fact that Intel internally has been using a different name from the rest of the industry, the IPU is it.
Intel told us last week that coming up “Intel will roll out additional FPGA-based IPU platforms and dedicated ASICs. These solutions will be enabled by a powerful software foundation that allows customers to build leading-edge cloud orchestration software.” (Source: Intel)
Although the company mentions ASICs, its Ethernet 800 Series we would consider more of an Offload NIC versus a SmartNIC. We would also put the IPU in more of the “Exotic” category rather than a DPU category based on the STH NIC Continuum framework.
While NVIDIA and much of the rest of the industry are focused either on application-specific or general-purpose DPUs, Intel is focused on the IPU market for hyper-scale clients at the moment. Given Intel’s current CEO was extolling the virtues of DPUs with VMware Project Monterey ESXi on Arm on DPU just a few months ago when at VMware, we expect this vision is going to be Intel’s path forward.
Hopefully, in the meantime, we hope Intel clears up its marketing. Mellanox pioneered the use of IPU for this type of device but eventually moved to DPU to drive industry education and adoption. The reason we have a Continuum of NICs is that there were so many vendors calling their products different things. The industry moved to DPUs in the summer of 2020 with every major vendor adopting the term for their general-purpose infrastructure platforms. The benefit of moving away from IPU is that it gets one away from confusion with these previous efforts and confusingly similar names in the processor space such as with the Intel Image Processing Unit, Graphcore IPU, and the Mellanox (now NVIDIA) IPU.
Intel currently seems focused on selling to hyper-scale clients with FPGA-based solutions. Indeed, Pat Gelsinger did not even mention an Intel-based NIC at the VMware Project Monterey announcement. We expect to see more on this class of processors from Intel later this year whereas we are already working with NVIDIA BlueField-2 DPUs in the STH lab. Given when we will likely hear more, our best guess is that more general availability of an Intel DPU-class device may come in early 2022 when NVIDIA will have its third generation BlueField-3 device. While Intel may be leading the hyper-scale market with FPGA-based solutions, development for higher-margin non-hyperscale DPU integration is happening on Arm cores and on platforms from its competitors.
We hope Intel can create a DPU solution in the coming year, but for now, the Exotic IPU solution is a start.