3rd Generation Intel Xeon Scalable PCH: Lewisburg Refresh
There is a brand new Lewisburg platform controller hub (PCH) with a different feature set and SKUs. Now, the Intel PCH is quickly becoming a relic. New Arm server designs incorporate PCH functionality, as do AMD EPYC designs. The extra PCH is one reason Facebook had to do a Yosemite platform refresh just to use these in single socket designs because each node has a PCH to place on a PCB and cool.
The new PCH’s are called LBG-R or Lewisburg Refresh chips. The “refresh” trend is in full swing at Intel. First, we had the Big 2nd Gen Intel Xeon Scalable Refresh followed quickly by an Intel Atom C3000 Line Quietly Refreshed. Now, we have Cascade Lake Refresh Refresh, or Cooper Lake with a refreshed PCH, Lewisburg Refresh.
At STH, in 2017 we had a piece that focused on the Burgeoning Intel Xeon SP Lewisburg PCH Options Overview. The Lewisburg or “LBG” PCH itself launched in mid-2017 with Skylake Xeons. You will notice that there were a ton of SKU options with many different features.
With the Cooper Lake 3rd Generation Xeon Scalable series, we get a refreshed PCH that Intel is dubbing the “Intel C620A” chipset series. Intel was fairly light on details during the LBG-R / C620A launch, but there are three new SKUs. These SKUs are for Cooper Lake as well as Whitley platforms. That means the C620A/ LBG-R will be the PCH’s of Ice Lake Xeons unless plans change.
It turns out that having integrated 10GbE LAN was useful, but the thinking has changed at Intel. Removing 10GbE support means that Intel can provide a lower power PCH. Also, the 10GbE networking is X722 or 700 series in the Lewisburg PCH which does not mesh with the PCIe Gen4/ Ice Lake/ Whitley era of 800-series or E810 networking. As a result, LAN is removed.
SKUs in this generation are effectively only three, largely because of the networking rationalization. The SKUs are:
- Intel C621A with no QAT
- Intel C627A with QAT (100Gbps encryption, 65Gbps compression, and RSA acceleration of 100K operations per second)
- Intel C629A with QAT (100Gbps encryption, 75-80Gbps compression, and no RSA acceleration)
PCH 10GbE networking was popular in China and other markets where there are major segments that wanted 10GbE at the lowest cost possible.
From a platform perspective, Intel did not go into detail here, but there is a small set of new RAS features added over Cascade Lake. The big change will be with Ice Lake and Whitley. That will be important as Intel introduces even more new security features.
This is a fascinating launch indeed. On one hand, we have the new Intel Xeon Cooper Lake generation that is bringing bfloat16 and a large UPI footprint. There are also some smaller platform features along with a big bonus for App Direct 4-socket customers. This platform will be with us for some time as well as the next 4-8 socket platform will be Sapphire Rapids in 5-6 quarters if it stays on schedule.
At the same time, in two quarters, the Ice Lake Xeon chips that will offer much higher per-core performance, more cores per chip with higher TDP, more PCIe lanes and PCIe Gen4, more memory channels and memory/ per CPU, memory encryption, Optane PMem 200 in Memory Mode, a slew of RAS features security enhancements and more arrive. There is a case to be made that unless you are in dire need of a top-bin 4-socket platform today, waiting six months may net you similar performance in the next-gen 2-socket platform.
Adding another twist, with the lack of Memory Mode support, there are some customers who will be better off using existing 4-socket servers with 512GB DCPMMs (PMem 100) in Memory Mode and skipping the new Copper Lake Xeon platform entirely. Memory costs a lot and the existing 4P systems are now well-known quantities which can make it hard to switch if the cost of memory does not outweigh the UPI benefits.
One may point to the new launch and rightfully state that even with the new Cooper Lake 4-socket platform AMD EPYC 7002 “Rome” 2-socket still has more cores and more PCIe bandwidth. That is accurate, but Intel is offering more memory bandwidth and 250W TDP per socket which means these chips can use twice as much thermal headroom as the AMD part. That is a strange statement, but it helps turbo clocks.
For the Intel Xeon Platinum 9200 family, the market is now even smaller. Technically those are Intel’s highest per “socket” CPUs, but now with higher TDPs, bfloat16 and Optane PMem 200 in App Direct mode support the market for such chips is going to be even smaller. For a segment of Platinum 9200 buyers, the new Cooper Lake systems are a far better option.
Perhaps the most interesting part of the launch is that we get to see an intermediate generation. Intel has long touted its portfolio of solutions and we get to see some of them either enabled or set up by the new 3rd generation Intel Xeon Scalable. In a way, we are getting a view into the slingshot of technological advancement that is about to come our way as we move later into the year. Competition is a good thing. Cooper Lake and Cedar Island are clearly a stopgap step. We at least get a view into a greatly accelerated future which will be very exciting.