Just in time for Computex, Silicon Motion is launching their SM2524XT SSD controller, a next-generation mainstream PCIe Gen5 DRAM-less controller aimed squarely at PCs and edge devices. First announced by the company last year and set to become available shortly, Silicon Motion claims that the SM2524XT will be able to deliver up to 14GB/sec sequential read speeds and up to 2.5 million IOPS of random performance. The company is positioning the chip as a solution for systems in the AI era that must handle increasingly complex local-agent and large-language-model tasks, as well as using it to host KV caches. This controller release comes as, with current DRAM and NAND prices, there is a heightened industry focus on leveraging DRAM-less SSDs to keep costs in check.
Inside the Silicon Motion SM2524XT Architecture and Performance
Built on TSMC’s 6nm process and featuring a quad-core ARM Cortex-R8 CPU, the SM2524XT is DRAM-less controller designed to adhere to the ONFI 5.2 specification. Silicon Motion claims the controller will offer to 25 percent higher performance per watt than the previous-generation SM2504XT controller, targeting sub-5W SSD power consumption for client and edge PC form factors.

The controller can reach sequential performance up to 14GB/s for reads and 12GB/s writes, based on Silicon Motion’s internal testing. Those numbers rely on the full PCIe Gen5 x4 bandwidth and fast NAND flash. The random performance claim of 2.5 million IOPS is where the controller is most differentiated, stemming from the combination of a quad-core processor and four NAND channels running at up to 4,800MT/s.

At the core, four NAND channels with 16 chip selects per channel and a quad-core processor work in parallel to manage flash translation layer (FTL) scheduling and error correction. Silicon Motion says this design boosts random IOPS to 2.5M. Years ago, it took us 24x SATA SSDs to hit 1M IOPS. Now it is a DRAM-less SSD territory to do 2.5x that.

Power efficiency is a key differentiator for many applications with limited thermal headroom. Silicon Motion is targeting a total drive power consumption of under 5W for SSDs built with the SM2524XT, relying on a combination of TSMC 6nm process and PI-LTT (Intelligent Power Optimization with Low-Voltage NAND I/O) technology to get there. Here, the company’s internal test results show the controller achieving 14,800 MB/s in sequential read at 4.689W active power, compared to 11,511 MB/s at 4.67W for the previous generation. Power draw remains nearly identical while delivering roughly 29 percent more sequential throughput.

Silicon Motion also sent its comparison slide to frame the new controller as a performance-per-watt update over the previous generation. That matters in notebooks and SFF AI PCs (and Project TinyMiniMicro nodes), where SSD thermals can become a real limit under sustained workloads.

On the reliability side, Silicon Motion is positioning the SM2524XT around more intelligent controller behavior, not just headline sequential bandwidth. The company calls out proactive fault monitoring and automatic recovery as part of the controller story.

Error correction is another piece of the pitch. Silicon Motion says its 8th-generation NANDXtend technology and on-disk training are designed to improve QLC NAND endurance and data integrity as SSDs are asked to support sustained AI inference traffic.

The SM2524XT will also be Silicon Motion’s second-generation mainstream (XT) controller to implement separated command address (SCA) support, which was introduced as part of the ONFI 5.1 spec. By separating command and address signals between the SSD controller and NAND flash, Silicon Motion says the design achieves higher efficiency, lower latency, and better overall performance compared to traditional shared-bus approaches.

PI-LTT technology further reduces NAND I/O power by lowering I/O voltage. Silicon Motion describes this as part of an intelligent power optimization approach that helps maintain performance while keeping power consumption low for AI PC thermals.

Overall, there is quite a bit here for the new controller.
Final Words
Silicon Motion has positioned the SM2524XT as a bet that AI PCs will need storage controllers specifically optimized for KV Cache workloads rather than general-purpose performance. The DRAM-less design with claimed 2.5 million IOPS is an aggressive target for the edge AI segment, where power and thermal constraints are tighter than in server environments. Silicon Motion does not sell SSDs directly. Instead, it supplies controllers to SSD manufacturers. Actual product performance will depend heavily on which NAND flash partners are selected and how aggressively they tune their firmware. DRAM-less design means sustained random IOPS are particularly sensitive to NAND quality and the FTL implementation. Hopefully, we will find drives with the new controller soon to test.




Seeing “Psychic Spiritual Decoding” on a slide about ECC in an SSD controller was…not what I expected.
Is that less weird in a context I’m not familiar with; something that suffered in machine translation, or is that indeed weird?
Ha! Good eye!
That appears to be a mistranslation (or someone goofing around) on SM’s part. Their third tier of ECC is “Group Page RAID.”
“This algorithm corrects for larger 16KB code-word unit errors, providing a second level of protection that ordinary 1KB code-word unit ECC engines used in conventional SSDs cannot offer.”
https://www.siliconmotion.com/company/blog/DigitalSurveillance/detail