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AMD Takes the Lid off of Next-Gen EPYC 9006 Venice As Zen 6 Comes to Servers

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AMD’s EPYC Future Roadmap

Finally, alongside AMD’s EPYC 9006 server CPU announcements for 2026 and 2027, the company is also providing its first server CPU roadmap beyond the Zen 6 generation, outlining its plans through 2030.

Following the Zen 6-based Venice and Verano chips, in 2028 AMD will begin releasing its 7th generation of EPYC chips: Florence.

AMD_AAI_EPYC CPU Roadmap
AMD_AAI_EPYC CPU Roadmap

Based on AMD’s future Zen 7 CPU core architecture, Florence brings with it a few highlights. In particular, AMD will be adding AI compute extensions, which they are calling ACE. Presumably, these will be something akin to Intel’s AMX or Arm’s SME, which are dense matrix calculation extensions that AMD currently lacks an equivalent to.

Meanwhile, AMD will manufacture the chips on what it calls a “next-gen process node.” Given the timeline, this may be TSMC’s A14 node, as that is similarly slated to start mass production in 2028. But whatever the process node is, AMD will be keeping its split high-frequency and high-density core designs, with both Zen 7 and Zen7c cores slated to be produced.

Florence will also carry over Venice and Verano’s memory support, with AMD explicitly noting support for both MRDIMM and LPDDR memory in its presentation.

In fact, Florence will reuse the same SP7 and SP8 platforms as Venice. Like the Genoa/Turin overlap, where AMD used the same platforms for two generations of chips, Venice and Florence will share platforms. With that, AMD intends to keep the same split between SP7 and SP8, with SP7 being for their highest-performance processors while SP8 remains the more cost-effective chip. Not all CPU vendors are doing multiple generations of CPUs in existing sockets as the market has heated up.

AMD_AAI_EPYC Florence
AMD_AAI_EPYC Florence

Meanwhile, Verano’s successors will be Ferrara and Fidenza. Ferrara will fill the same AI host-node role that Verano is slated for. Ferrara will also be the CPU used in AMD’s Helios 600 rack-scale system, due in 2028. So the Zen 6-based Verano will have only about a year as AMD’s top rack-scale CPU before it is replaced. AI infrastructure is advancing at a much faster pace than we have traditionally seen in the data center.

This leaves us with even less known about Fidenza. The Zen 7 architecture CPU targets agentic AI workloads, with a particular focus on performance-per-watt. But how different that is from Ferrara (or Florence) remains to be seen.

Finally, in the 2030 timeframe, AMD will release its EPYC Ravenna processor. As the farthest-out chip, this is also the least detailed. It will be based on AMD’s Zen 8 CPU architecture, but no further details beyond that are being disclosed.

Final Words

AMD’s expansion of server CPU offerings has been gradual, but it has also focused on delivering server chips where they can have the most impact. This strategy has worked well so far, with AMD claiming 46% of the server CPU market by revenue, according to the most recent IDC report. And now that AMD is no longer the underdog in the field, the strategy has shifted from just outperforming with hardware while catching up in market share, and towards what AMD can do to expand its market share.

AMD AAI EPYC Venice_in_production
AMD AAI EPYC Venice_in_production

Like so many other growth drivers in the tech industry this year, AI is one of them. While AMD’s Zen 6 CPU architecture and associated Venice CPUs will eventually make their way into all sorts of systems, from classic servers to specialized AI host nodes, AMD’s focus right now is clearly on the rapidly growing AI market. By deploying Venice both alone and as part of the Helios rackscale system, AMD is intent on making their biggest run yet in this market.

Consequently, AMD has laid out its plans to release its most extensive stack of EPYC processors yet over the next 15 months. With two variations on their mainstream Venice CPUs, the HPC-focused Venice-X, and the AI-focused Verano, AMD’s EPYC lineup has never been so expansive, or really, so aggressive.

AMD AAI EPYC 9006 Summary
AMD AAI EPYC 9006 Summary

Ultimately, how that plays out over the coming year remains to be seen. But with features such as 16 memory channels, PCIe Gen6, MRDIMM support, and core counts now hitting 256 cores in a single processor, AMD is bringing a lot to the table that can reach a wide range of its server CPU customer base. The company has set its sights on selling EPYC 9006 processors to everyone from new AI customers to existing customers looking to consolidate, and it has a convincing product stack to do just that.

If you subscribe to Patrick’s theory on agentic AI impact for data center CPUs, then we are just getting started on the industry’s upswing for data center CPUs.

What Are Data Center CPUs for Agentic AI, How to Find Them, and Why Growth is Enormous by Patrick Kennedy

The answer may be different than you have been led to believe

Read on Substack

1 COMMENT

  1. “AMD will be adding AI compute extensions, which they are calling ACE. Presumably, these will be something akin to Intel’s AMX or Arm’s SME”

    I’m surprised at this statement. We know exactly what ACE is since its whitepaper is half a year old, and compiler enablement is well underway for both GCC and LLVM. It could be a nice article to explain it here though.

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