AMD Instinct’s Future: CDNA 5, Taalas, and Beyond
Though AMD’s immediate focus is on the MI455X for obvious reasons, the company has a public roadmap that extends out to the next few years, and an internal roadmap that goes even farther.
With AMD having moved its server GPUs to a yearly cadence starting with the MI350 generation last year, the company is set to tape out new server silicon every single year in a race to roll out new features and keep ahead of the competition. We will also see at least a couple of different chip variations over time.
In the immediate future, AMD’s other big MI400 series project will be the Mi430X. Though not the primary subject of AMD’s AAI discussions, MI430X will be AMD’s Instinct GPU offering for the HPC market, offering far higher FP64 vector compute rates than the 5 TFLOPS MI455X. These are chips designed for classical GPU computing scenarios that need high performance with high-precision formats, and that process data in smaller chunks as vectors rather than as ultra-dense multi-dimensional tensors. It is a market that has lost some of its luster in recent years as AI-focused GPUs present a larger (and more profitable) market opportunity, but one AMD believes is still worth pursuing.
For AAI, AMD briefly disclosed some of the high-level performance figures for the chip. On the compute front, MI430X will be able to deliver 288 TFLOPS of FP64 vector performance, which is about 3.5x the rate of the outgoing MI300X, which was AMD’s previous flagbearer for the HPC market. Meanwhile, on the memory side of matters, AMD has confirmed that MI430X will ship with the same 432GB HBM4 memory subsystem. Reading between the lines, we expect that MI430X will be using a new, HPC-focused XCD in conjunction with AMD’s existing MI455X FCDs. Which, if true, would handily illustrate the benefits to AMD of using chiplets and being able to reuse them in different products.
MI430X is slated to become available in the first half of 2027, which puts it at around 3 to 6 months after MI455X.
Meanwhile, the MI400 series already has a successor in the works with the MI500 series, which is slated to land in 2027 (presumably near the end of the year). Based on the CDNA 6 architecture, the marquee feature for the MI500 series is support for more bandwidth across the board.
On the memory side of matters, the GPU will be able to be paired with the next generation of HBM memory, HBM4e. The iteration on HBM4 is designed to support higher memory frequencies, with current proposals calling for anywhere between 12.8Gbps/pin and 16Gbps/pin, a range which would mean nearly doubling the amount of memory bandwidth per stack for AMD’s GPUs.
Meanwhile on the networking side of matters, AMD is promising “leadership GPU scale-up domain” support, though the high-level overview does not go into detail in what this will entail. It is no secret that NVIDIA has its own project to scale up to a 144 GPU domain (Kyler NVL144), so this is presumably AMD’s answer to that. GPU counts aside, AMD says that they will be using copper and optical networking for MI500 systems (and the resulting Helios 500), moving beyond the current all-copper networking architecture and the hard distance limitations imposed by copper. The combination of these networking questions certainly raises a lot of questions about what to expect from MI500, and among these, it will be interesting to see if AMD sticks with UALoE for the scale-up domain, or if in another year we will finally see native UALink switch chips, allowing AMD to stop using Ethernet encapsulation.
Finally, following the Mi500 series in 2027 will be the MI600 series in 2028. At this point, AMD is not revealing any details about that family. Even the GPU architecture is simply referred to as “CDNA Next”, but it is consistent with AMD’s yearly server GPU chip cadence. Given what we have seen from AMD in the past with GPU architectures, there is a good chance that CDNA Next will be a more extensive GPU architecture upgrade (with CDNA 5 serving as something of a refresh of CDNA 4), but the full details remain to be seen. With server GPUs having taken on such an important role in AMD’s revenue (and thus the amount of cash AMD has to throw at the subject), we are in something of a new era for AMD GPUs.
With a two-year cadence, CDNA Next/MI600 may also be just soon enough for AMD to start integrating some of the technology they acquired in early August from chip startup Taalas. Taalas’s ASIC-style AI inference chips are radically different from AMD’s programmable GPUs, but there’s no disputing the fact that burning AI models and their weights right into a chip as fixed-function hardware makes for very efficient (but very inflexible) hardware.
