AMD has a new pre-configured FPGA accelerator with HBM. The new AMD Alveo V80 combines an AMD Versal HBM XCV80 device (from Xilinx lineage) and 32GB of HBM2e memory with four QSFP56 connections for a neat accelerator, albeit not an inexpensive one.
New Faster AMD Alveo V80 Accelerator with HBM2e and Fast Networking
A big part of the Alveo line is to allow for the integration of FPGAs without a partner needing to do board design and the packaging around the FPGA, or now Versal Adaptive SoCs.
The card itself has four 200G QSFP56 cages, the big AMD Versal HBM XCV80 SoC, 4GB of onboard DDR5 plus an additional DDR4 DIMM slot with a 32GB DIMM. There is then an extra power and, perhaps notably, a MCIO x8 and two MCIO x4 slots. A PCIe Gen5 x8 or PCIe Gen5 x16 slot is only capable of pushing around 200Gbps of network bandwidth. Adding more PCIe Gen5 connectivity.
We also get the onboard Arm processors for applications and management that the 4GB of memory ties to. Here are the specs of the 190W TDP server card:
The big one, of course, is the 32GB of HBM2e memory. While high-capacity HBM3e is being consumed by many AI accelerators, HBM2e is an older generation HBM that is usually less expensive given that it is not competing to be integrated into accelerators that cost tens of thousands of dollars.
Final Words
If you are interested, these have an MSRP of $9495, so they are not inexpensive. Then again, if you are buying these as an alternative to building your own lower-volume card and doing the work to program your application directly onto the FPGA’s logic, then that might seem very reasonable. Still, we just wanted to quickly cover the new device for those wo look for these types of cards.
Shouldn’t that be 4 QFSP56 connectors instead of 8?
Are there any public repos with code that is made for these kinds of cards? I read the specs, and think there super interesting… then struggle to come up with what I would actually _do_ with them. It’s a whole SKU, so _someone_ is buying these in bulk.
@sean looking at the connectivity cores in this card they’re mostly used for high speed networking with specific functions offloaded to this card (IPsec, MACsec, crypto) instead of using the CPU as those tasks are incredibly difficult to achieve on CPU at these line rates. So think of hyperscalers/cloud providers that are buying these to build overlay/underlay networks with encapsulation or routing, storage networks with offloaded encryption, traffic inspection at high rates etc.