Ryzen Unrestrained: Pushing the Boundaries on Socket Power
Whereas all of AMD’s previous socket AM5 chips have shipped with TDPs at or below 170 Watts, the 9950X3D2 is pushing things to 200 Watts for the TDP and 270 Watts for the total package power tracking (PPT) limit. On paper, this makes it the most power-hungry AM5 chip yet.
The purpose of a higher power limit is two-fold. The first is simply that V-cache CCDs require more power to operate. Even with their lower voltages, the additional L3 cache and connections to it require a not-insignificant amount of power to operate. The second reason, in turn, is to ensure that the 9950X3D2 is never power-limited more than necessary. This is AMD’s flagship part – the grand finale for the Ryzen 9000 series – and they want to deliver on every bit of performance the chip can offer, even at the cost of power and power efficiency.
The significance of this, besides making this the highest-powered AM5 chip to date, is that this technically violates the original AM5 socket specification. At the time that AM5 was launched (alongside the Zen 4 Ryzen 7000 series), AMD stated that the socket was designed for a power limit of 170W TDP/230W PPT, which at the time was a significant step up from the 105W/142W limit of the previous AM4 socket. So with the launch of the 9950X3D2, AMD has more or less thrown AM5’s formal power limits out the window.
In practice, of course, motherboard vendors have a habit of overbuilding their motherboards to begin with, particularly for high-end consumer and OEM motherboards. So the consequences of going beyond the original 170W AM5 limit are fairly minimal outside of the additional power consumption. At worst, it means that lower-end boards that were built to spec (and not a Watt over) will not be able to provide quite as much power to a 9950X3D2 as it would like. But it will work all the same.
Looking at the longer term, this does open the door to more high-powered chips down the line. AMD is expected to stick with AM5 for the Zen 6 generation of desktop processors as well, and while those dies will be built on a newer node, it can be difficult to walk back from the edge of power consumption since it means walking back on performance as well.
With all of that said, let us get to the most exciting part of the day: benchmarking and performance.
So, is it a 14 core with x1 management core per ccd? mb
You didnt do gaming benchmarks but still wrote, “games are not the type of workloads that benefit from the additional L3 cache on the second CCD.”
Why? Getting anything out of RAM to cache is always a 100x speed improvement. Its not a coincidense 9800x3d is the best gaming cpu with its large cache
@Alex
Games are typically very “chatty” between threads. This means that if the major threads for a game get split between the CCDs, they will take a sizable performance hit from the high CCD-to-CCD latency. A larger L3 cache in turn makes this worse in some respects, as it means there’s more data in the L3 cache on the other CCD.
Putting extra cache on the *first* CCD is fantastic for games. Putting extra cache on the second CCD is neutral at best – and if not for AMD’s utilities that keep games on a single CCD, it would make things worse.