Today we have the launch of the AMD EPYC 8004 “Siena” parts, as the fourth series of AMD’s fourth generation of EPYC. In this edition, we get some of the same technology we have seen before, but also some new things like a new socket. This is to target lower-power applications that cannot handle 250-400W TDP CPUs. If you wanted to EPYC, but your data center cannot support higher-TDP CPUs, then this is AMD’s answer.
AMD EPYC 8004 Siena Launched for Lower Power EPYC Edge
It is hard to believe that in June 2017 when I went to the AMD EPYC 7001 “Naples” launch in Austin, Texas, I had no idea that I would spend years living here between the third and fourth generation EPYC timeframes. In the last six years, we have gotten four main generations of AMD EPYC server CPUs. Still, if we exclude the EPYC 3000 series, the 4th Gen EPYC family now has four different variations, or as many as AMD had launched from 2017-2022 combined.
The AMD EPYC 8004 Siena is focused on a bit of a different market than its siblings. The AMD EPYC 9004 series has “Genoa” parts for general-purpose workloads. Genoa-X is for HPC workloads. Genoa-X has a dirty open secret we are choosing to ignore insofar as it is really good for a huge set of workloads with a massive 1.1GB of L3 cache. Bergamo is the stuff with as many cores as AMD can CPU for cloud service providers. Bergamo is the best for workloads that Genoa-X is not great for, but again, we will stick with AMD marketing segmentation here.
The AMD EPYC 8004 Siena is different. It only has up to 64 cores. It uses Zen 4c like Bergamo instead of Genoa(-X) with Zen 4. It also uses a different socket, the AMD SP6 instead of SP5 socket. There are also versions for higher temperature ranges and lower power operation.
The basic AMD EPYC 8004 recipe is up to four Zen 4c 16-core compute dies giving us up to 64 cores in the AMD EPYC 8534P. Zen 4c is the smaller and lower L3 cache Zen 4 variant that has the same ISA. This is the same core as in Bergamo.
The I/O die only offers 96 PCIe Gen5 lanes and six DDR5 channels, but on the pre-brief call, AMD said it is using the same I/O die as the EPYC 9004 series so it does not have to re-validate DDR5/PCIe Gen5 IP.
A quick side-by-side shows the AMD EPYC 9004 and EPYC 8004 series specs. One can see that the EPYC 8004 is designed for smaller and lower power systems than the EPYC 9004 series. Importantly, it is also single-socket only.
It is going to be interesting in the market to see the reaction to these parts. Intel has its monolithic die Sapphire Rapids parts for lower-power servers, but those can also run in dual-socket servers. Perhaps AMD’s message here is that if you need dual SP6 sockets, you are better off just buying into SP5 instead. While that makes practical sense, AMD is forcing users into that segmentation with this 1P-only distinction.
Next, let us get to the SKUs and pricing.
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It’s the most wonderful time of the year. Upgrade season! Farewell Epyc 3000s, you did well. The boards supermicro made for you, not so much. Between these and whatever Intel debuts, looks like there will be some actual options for storage and firewalls when you don’t want or need a 200W+ CPU but still want the actual server goods without buying something in 2023 that still uses a C3000 atom. Maybe….maybe….new Intel Atoms next week as well?
Interesting! This fill out an obvious gap in the lineup between “low power/price” Milan and Epyc 9000.
With these new 16c Zen4c chiplets, the announcement lacks L3 cache size info on the different SKU’s, determining the number of chiplets on each of the variations.
Specs list 2 DPC operation, but is anyone implementing this, or is it missing like on the other Genoa platforms?
As shown by the Intel Max and AMD X series processors, on-package cache and memory makes a huge difference for w variety of workloads. From a marketing point of view I wouldn’t be surprised if the cache were half that of the regular performance cores; from an engineering point of view I’m hoping that’s not the case.
Since the original 32-core EPYC 7551 processors have the same 180w rating and are currently available new at closeout prices 18 times cheaper than the just announced 8324P, it would be interesting to see a head to head comparison between the two on a variety of workloads.
In general it’d be interesting to track performance over four generations of Zen processors. Since many of these systems are still available such a comparison could also be practical, especially when including these Zen 4c systems.
@Eric Olson,
The performance differences between Zen1 and Zen4 are fairly well documented. Look at the reviews they’ve done here and compare the values. Dual socket 7601 did 21 kernel compiles per hour, dual socket 9654 did about 105 kernel compiles per hour. 5x the performance with 3x the number of cores.
Its kind of weird that AMD is focusing on telco as the use case instead of the huge small business market. Most small businesses don’t need a Genoa based server and would prefer the 8-24 core sienna SKUs that are here but that isnt’ part of the target market for some reason.
¯\_(ツ)_/¯
> Genoa-X has a dirty open secret we are choosing to ignore
What’s that?
Wes V said “The performance differences between Zen1 and Zen4 are fairly well documented. Look at the reviews they’ve done here and compare the values.” That’s a good point. In the present announcement we are talking Zen 4c cores.
At any rate, since the core counts and power budgets are the same, I think a head to head comparison of the 7551 to the 8324P would be informative.
In reply to Anob, I think the secret is that Xeon Max works well for general computing even though the marketing claims it’s only good for HPC. I think a secret intended to mislead someone else is called a dirty secret, but not sure.