Today we have the launch of the AMD EPYC 8004 “Siena” parts, as the fourth series of AMD’s fourth generation of EPYC. In this edition, we get some of the same technology we have seen before, but also some new things like a new socket. This is to target lower-power applications that cannot handle 250-400W TDP CPUs. If you wanted to EPYC, but your data center cannot support higher-TDP CPUs, then this is AMD’s answer.
AMD EPYC 8004 Siena Launched for Lower Power EPYC Edge
It is hard to believe that in June 2017 when I went to the AMD EPYC 7001 “Naples” launch in Austin, Texas, I had no idea that I would spend years living here between the third and fourth generation EPYC timeframes. In the last six years, we have gotten four main generations of AMD EPYC server CPUs. Still, if we exclude the EPYC 3000 series, the 4th Gen EPYC family now has four different variations, or as many as AMD had launched from 2017-2022 combined.
The AMD EPYC 8004 Siena is focused on a bit of a different market than its siblings. The AMD EPYC 9004 series has “Genoa” parts for general-purpose workloads. Genoa-X is for HPC workloads. Genoa-X has a dirty open secret we are choosing to ignore insofar as it is really good for a huge set of workloads with a massive 1.1GB of L3 cache. Bergamo is the stuff with as many cores as AMD can CPU for cloud service providers. Bergamo is the best for workloads that Genoa-X is not great for, but again, we will stick with AMD marketing segmentation here.
The AMD EPYC 8004 Siena is different. It only has up to 64 cores. It uses Zen 4c like Bergamo instead of Genoa(-X) with Zen 4. It also uses a different socket, the AMD SP6 instead of SP5 socket. There are also versions for higher temperature ranges and lower power operation.
The basic AMD EPYC 8004 recipe is up to four Zen 4c 16-core compute dies giving us up to 64 cores in the AMD EPYC 8534P. Zen 4c is the smaller and lower L3 cache Zen 4 variant that has the same ISA. This is the same core as in Bergamo.
The I/O die only offers 96 PCIe Gen5 lanes and six DDR5 channels, but on the pre-brief call, AMD said it is using the same I/O die as the EPYC 9004 series so it does not have to re-validate DDR5/PCIe Gen5 IP.
A quick side-by-side shows the AMD EPYC 9004 and EPYC 8004 series specs. One can see that the EPYC 8004 is designed for smaller and lower power systems than the EPYC 9004 series. Importantly, it is also single-socket only.
It is going to be interesting in the market to see the reaction to these parts. Intel has its monolithic die Sapphire Rapids parts for lower-power servers, but those can also run in dual-socket servers. Perhaps AMD’s message here is that if you need dual SP6 sockets, you are better off just buying into SP5 instead. While that makes practical sense, AMD is forcing users into that segmentation with this 1P-only distinction.
Next, let us get to the SKUs and pricing.