Intel Xeon D-2775TE First Benchmarks
We are still on some pre-production firmware, but we wanted to get at least some early benchmarks out. Again, we will update as we do our full reviews, but it would not be a Xeon D launch day without benchmarks.
Taking a look at 16 core performance, we can see some fairly strong gains without using accelerators. Just for some context, both the Xeon D-2775TE and the Xeon D-2183IT are 100W 16-core CPUs, but the D-2775T has a 200MHz lower base clock at 2.0GHz versus 2.2GHz for the D-2183IT.
On the c-ray 8K tests, we saw modest gains as well. For those unfamiliar with this, it is roughly equivalent to the Cinebench Windows benchmarks in terms of scaling with cores and frequency.
Something a bit harder on the CPUs is the chess bench using bmi2. We can see a nice generational improvement here.
Something one will quickly notice is that the Xeon D-1587 is quite a bit behind. It only has two memory channels, at lower speeds. Intel’s mesh architectures fare better than the 2015/2016 era dual ring with two memory channel Broadwell-DE series.
First Look: Intel Xeon D-2700 Series Power Consumption
Next, let us discuss the power consumption of the chips. Before we get too far, we are seeing the D-1700 is a lower power design than what we are showing here. We are going to have more on power consumption with our formal reviews.
The Intel Xeon D-2775TE we are using here has a TDP of 100W and is a higher-end 16 core/ 32 thread part. We have seen SKUs of up to 20 cores and have the 4-core D-1718T SKU as well.
In the 1U Supermicro platform, we saw idle generally in the 71-75W range and we could get into the 180-191W range under 100% CPU utilization workloads depending on which features we were testing.
We will get to that system in a bit, as it is one we expect to be on the higher-end of power consumption figures, especially with pre-release firmware.
Next, let us get to the platforms.
Intel Xeon D Platforms for vRAN and Networking
Intel is specifically targeting the vRAN market with the new Ice Lake-D series. We expect companies like Rakuten Wireless to craft solutions around the new chip. Still, something that was stark is the difference between the current development platform and the 2015-era platform. Intel’s development platform is specifically designed for a 5G Radio Unit and Distributed Unit combination.
The platform is called Fort Columbia. Here we can see SFP28 networking along with a few other intriguing features. Notably, the two RJ-45 ports on the right of the photo below can be used to power the unit via PoE++ inputs.
The large white clamshell is a plastic designed to not interfere with wireless signals. That lets the unit have a cover for protection while still allowing radios to operate.
The system itself has some fascinating features. We will get to the Ice Lake-D portion in a bit, but the large black heatsink has other interesting components. First, there is a Mt. Bryce FEC accelerator. This is an ASIC I believe from the eASIC lineage at Intel. Also under that heatsink is a TI AFE7920 front end and a Arria 10 GX480 FPGA. If you want to know what Intel’s vision of putting together silicon looks like, this is certainly one iteration.
At the top of the baseboard, one will see two cutouts. These are for the two radios. Since you may want to see a 5G radio, here is one we can show you:
Here is the other side:
Of course, we want to take a look at the subject of today’s piece, the Ice Lake-D module.
The Ice Lake D-1700 part sits on a HPC-COM module. Since Ice Lake-D is soldered, this allows easy configuration of the units so they can have different cores and acceleration technologies with the same base design. We can also see that only two of the three channels for the Xeon D-1700 series SoC are being exposed here:
If folks are interested, we can get more into the Fort Columbia platform. Next though, let us take a look at some Supermicro platforms.