Tag: Agilex
New Intel IPUs and Mount Evans ASIC is its First DPU...
New Intel IPUs with Agilex and Xeon D are announced along with Mount Evans the company's first DPU IPU ASIC that sheds x86 for Arm Neoverse
Intel Claims Agilex FPGAs are Twice as Good as Xilinx Versal
Intel is out with a new claim that its 10nm SuperFin Agilex FPGAs are twice as efficient as Xilinx Versal ACAPs
New Intel Open FPGA Stack or OFS and eASIC N5X Add...
New Intel Open FPGA Stack or OFS helps developers get going faster with FPGAs and the eASIC N5X is a new structured ASIC product
Intel Agilex Family Hot Chips 32 Update
Intel Agilex with 10nm process, PCIe Gen5 and CXL, new transceivers, and a new layout with better ALMs and routing for next-gen FPGA deployments
Intel 10nm SuperFin Enhanced SuperFin and Hybrid Bonding
We discuss the Intel Architecture Day 2020 disclosures around 10nm SuperFin, Enhanced SuperFin, and new packaging techniques such as hybrid bonding
Intel Stratix 10 Adds UPI and PCIe Gen4 Readying for CXL
The Intel Stratix 10 adds UPI for cache coherent connectivity with Xeon CPUs along with PCIe Gen4. Intel also hints at an Agilex with CLX and PCIe Gen5
Intel Agilex Next-Gen FPGAs Shipping to Microsoft and Others
Shipping to early access customers such as Microsoft, the new Intel Agilex FPGAs appear to be coming out according to earlier guidance
Intel Agilex Launched and Takeaways from a Discussion with Dan McNamara
The new Intel Agilex FPGA line has been launched. STH had the opportunity to discuss the new line incorporating DDR5, 112G, and PCIe Gen5 with Dan McNamara