Intel Demonstrating Broadwell-EP with FPGA On-package at SC16

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Intel Broadwell Plus FPGA
Intel Broadwell Plus FPGA

We have heard this is going to be more common in future generations of Intel HPC chips, however at the Intel booth at SC16 we received a very interesting demo. In this demo, Intel is showing off a Broadwell-EP chip with an on package Altera Arria 10 FPGA and how that combination can increase performance.

Intel Broadwell Plus FPGA
Intel Broadwell Plus FPGA

The demo at the booth showed that the Intel Xeon E5 along with the Altera Arria 10 FPGA. We asked how this was being accomplished and were told that the demo was not just an Intel Xeon E5 with an Arria 10 FPGA PCIe card. We were told that this is a sample setup sent to some customers that combined the Intel Xeon E5 with Arria 10 FPGA on-package. We confirmed that this was a Broadwell not a Skylake generation part and were told that it was indeed Broadwell. The expectation is that these Intel Xeon E5 + FPGA chips are being used by developers and early access customers prior to Skylake-EP’s early access shipments start en masse.

For those wondering how the Altera integration is going, we are seeing a number of products coming to market with Arria 10 FPGAs. This is a specific example where Intel is pushing ahead with integration without waiting for the next-generation Skylake-EP processors.

We are going to have more on Intel’s AI efforts later this week, as well as the FPGA integration. Intel did, however, introduce a PCIe based Arria 10 FPGA card at SC16. The Intel Deep Learning Inference Accelerator is a very interesting FPGA card that comes bundled with Intel’s software for CNNs. The idea is that this product helps bring common CNN frameworks as an out-of-the-box experience for AI/ deep learning developers.

Intel Deep Learning Inference Accelerator Coming 2017 SC16
Intel Deep Learning Inference Accelerator Coming 2017 SC16

We understand that the Intel Deep Learning Inference Accelerator (DLIA) is due out in early 2017. Apparently, there are working Intel Xeon E5 + Arria 10 FPGA packages already available to select organizations.

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Patrick has been running STH since 2009 and covers a wide variety of SME, SMB, and SOHO IT topics. Patrick is a consultant in the technology industry and has worked with numerous large hardware and storage vendors in the Silicon Valley. The goal of STH is simply to help users find some information about server, storage and networking, building blocks. If you have any helpful information please feel free to post on the forums.

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