IBM announced that it has hit a new milestone in the development of future semiconductor process technology. This week, IBM showed off a 2nm test wafer which will further increase transistor density in future generations of chips, with a catch: this is a test chip.
IBM Hits 2nm with New Test Chips
The new IBM 2nm test chips were shown by the company as Intel is in the midst of transitioning to 10nm and TSMC is shipping 5nm in its devices. Although IBM is showing a wafer here, this is more of a test vehicle than a production platform. You are not looking at the Apple M1X or M2 silicon here.
Saying “2nm” is confusing these days. Years ago we had 2D transistors and it was a bit easier to define density. Here is the 2nm IBM nanosheet cross-section which appears to show a gate all around design. As chip companies transitioned to 3D technologies, e.g. Intel 10nm SuperFin Enhanced SuperFin and Hybrid Bonding, comparing one company’s “7nm” to “7nm” generations may result in significantly different transistor densities. Perhaps it would have been worthwhile to get away from using “nm” in favor of a density metric or generation name. Intel has shown us with Skylake generations that using generations may be challenging and with a future of heterogeneous packages that also need die-to-die interfaces, perhaps this is not the only important metric.
The end goal of this 2nm vehicle is that IBM is demonstrating technology that will be used to further push the limits of how many transistors can be packed into a single chip. It is hard to directly compare foundry to foundry, but generally, semiconductor process improvements make chips physically smaller and use less power on one extreme or fit more compute power into the same footprint for most of the data center chips we cover.
We want to make it clear to our readers that this is a test chip, not a volume manufacturing line. Creating a lower-complexity perfect sample is different than perfecting economically viable volume production lines.
A few weeks ago, we did not cover this on STH but Intel announced that it was extending a R&D partnership with IBM. Asking Intel “why?” resulted in the recognition that the IBM folks were top-tier researchers. It was not said explicitly, but we have a feeling that IBM also patented some key technology that Intel wants to use. IBM is not a high-volume semiconductor manufacturer like TSMC, Intel, Samsung, and others. Instead, it is a world-class research facility with deep industry connections. While IBM as a company may be focused on discontinuing ultra-popular open-source operating systems, driving cloud revenue, the semiconductor research business is an example of something that feels non-core but IBM is so good at that the business thrives.
Perhaps the big news is that silicon technology will continue for the next few years even though a decade ago some in the industry were fearing an insurmountable cliff in getting to new process nodes. The IBM 2nm test chips is a testament that providing high-intellect individuals, solid facilities, and a lot of money can overcome challenges.
[Editor’s note: for anyone wondering, the inside of the IBM facility is likely not as monochromatic as shown above. That press shot seems to be a de-saturated UHD 4K image.]
“get away from using “nm” in favor of a density metric” – yes.
“generation name” – no.
I would be interested in knowing IBM’s (as a parent) role in Red Hat changing the alignment of CentOS. Common media all report that the decision was “IBM Driven” but I cant find one source or reference to anyone at IBM making such a decision. IBM may have given Red Hat some revenue goals and left it up to Red Hat to determine how to get there. But I haven’t heard anyone at Red Hat say that either. Is CentOS getting a free or revenue ride off of Red Hat’s work? No one seems willing to discuss it in those terms, just “bad IBM”. So what is it really?