For the PC hardware space, the marquee announcement coming out of CES 2026 this year is without a doubt the launch of Intel’s Core Ultra Series 3 of chips. Going by the codename of Panther Lake, the latest of Intel’s lakes marks two very important milestones for the company. Besides being the launch of a new generation of hardware – with new architectures and new features all around – the Core Ultra Series 3 also marks the debut of Intel’s highly anticipated Intel 18A process node, which itself incorporates several major changes in how chips are built. As a result, the launch of the Core Ultra Series 3 has become a critical moment for both halves of the house of Intel – chip design and chip manufacturing – to show off what they can do.
Coupled with that, the 2026 competitive landscape is giving Intel the rare opportunity to release new silicon without being directly contested by surging rival AMD. With the latter company essentially in the middle of their current generation of hardware, the Core Ultra Series 3 is the only new hardware landing in PCs this winter, affording Intel a critical window of opportunity to leapfrog AMD – at least so long as Intel can successfully take advantage of it. As a result, it is an important year for Intel not only with regards to technology, but in terms of clawing back x86 client market share as well.
Suffice it to say, there is more than a bit of pressure on the beleaguered chipmaker in 2026 to show that they can still deliver the goods. And Core Ultra Series 3 is a sizable stack of goods indeed.
The Core Ultra Series 3’s role, in turn, will be to secure and grow the mobile PC market for Intel. As Intel has been wont to do in some product generations in recent years, they are not executing a tandem desktop/mobile release for the hardware – instead, Core Ultra Series 3 is only for mobile devices (and other devices based on mobile hardware). The Panther Lake platform will not be coming to the desktop market, which will continue to be served by Intel’s Core Ultra 2 Series (aka Arrow Lake).
Meanwhile, the mobile market can look forward to 14 Core Ultra Series 3 chip SKUs hitting the market starting on January 27th. And even more chips will come farther down the line when Intel begins shipping its non-ultra Core Series 3 chips later this year. So Intel is going all-in with their Series 3 hardware this year, from top to bottom.
That means there is a lot to discuss about this week’s launch announcement. So let us dive right in.
Intel Core Ultra Series 3: Powered by Panther Lake
Underlying the shiny Core Ultra Series 3 branding – or just Series 3, as Intel likes to call it – sits Intel’s Panther Lake platform. The latest iteration of the Lake series, Panther Lake brings new architectures to virtually all of Intel’s major functional blocks. This includes a new CPU architecture for both the P and E cores, a new GPU architecture for the integrated GPU, a new NPU architecture for local AI inference, a new generation of Wi-Fi hardware, and even a new IPU for camera input. About the only thing not new on Panther Lake is memory support – and that has more to do with nothing having succeeded DDR5 and LPDDR5X quite yet.
Intel held extensive press briefings back in the fall on the architectural side of Panther Lake, so we wo not reiterate all of that here. But at a high level, Intel is promising a modest increase in CPU performance coming from Arrow Lake, and a more significant increase in GPU performance. All with significant energy efficiency improvements thanks to a combination of architectural improvements and the Intel 18A manufacturing process.
This generation also sees Intel’s bifurcated platform setup brought back down to a single platform. Whereas Series 2 was comprised of a low-power platform (Lunar Lake) and a high-performance platform (Arrow Lake), Panther Lake goes back to Intel’s traditional roots of having a single platform architecture for the entire mobile space.
This may sound a bit like rearranging the deck chairs, but it is actually incredibly significant: Lunar Lake was very well received thanks to its energy efficiency (and Arrow Lake, not so much), but Intel has insisted that they do not (and will not) do such a split again. As a result, Panther Lake has a critical task in holding on to Lunar Lake’s energy efficiency while still offering the full range of performance of a typical Intel chip stack.
The third generation of Intel’s tiled (chiplet) architecture integrated using Intel’s Foveros 2.5D packaging, Panther Lake also brings a few changes to how Intel’s mobile chips are constructed. Whereas Meteor Lake and Arrow Lake were comprised of 4 top-level tiles – CPU, GPU, SoC, and I/O – Intel has distilled this to 3 top-level tiles for Panther Lake: a compute tile, a GPU tile, and a platform controller tile.
The net result is that at a high level, Panther Lake looks like a traditional Intel desktop PC compressed into a single chip. The compute tile being a traditional Intel CPU with its memory controller and other processing logic, a GPU tile that functions a bit like a discrete GPU, and then a platform tile that holds all of the I/O and USB functionality that one would find on an Intel chipset PCH.
For Panther Lake, Intel has developed two versions of each of these tiles: a big/high-performance version, and a small/low-performance version. Between these tile sets, Intel can conceivably mix and match tiles in any of 8 different configurations.
In practice there will be 3 configurations: the small compute tile paired with the small platform and GPU tiles, the big compute tile paired with the big platform and small GPU tiles, and finally a configuration with the big compute tile paired with the small platform tile and the big GPU tile (notably, Intel will not offer a make-me-one-with-everything chip config). The exact makeup of any given chip SKU is going to be pretty opaque to consumers, but enthusiasts should have little trouble sussing out which is which based on the chip’s specifications. And notably, all of these configurations will use the same chip package type, simplifying things for OEMs by letting them easily swap between any chip SKU.
All of the compute tiles will be fabbed by Intel on their 18A process. This marks the return of manufacturing of the most critical portion of Intel’s chips to their own fabs – Lunar Lake (in)famously relying on TSMC for its compute tile. Intel has retained their P/E/LPE core types for Panther Lake; both the small and big versions of the compute tile include 4 P cores and 4 LPE cores, meanwhile the big core adds 8 E cores to the mix for a 4/8/4 configuration.
Meanwhile both platform tiles will be manufactured externally by TSMC. And finally, the GPU tile will be split down the middle: the smaller, 4 core version of it will be manufactured by Intel on their Intel 3 process, and meanwhile the larger 12 core version will be manufactured by TSMC on their N3E process. In either configuration, Intel is now once again supplying the bulk of the silicon for Panther Lake, but it is interesting to see that Intel has maintained their flexible foundry sourcing model up to this point.
While using Intel 18A is a step in right direction, Panther Lake is still wholly dependent on TSMC since the I/O tile is made by them. The 12-core GPU tile is also TSMC, while the basic one is Intel 3.
Intel is the almost only company running right way in the US’s semiconductor industry…
Losing manufacture simply means losing nation.
We can remember the fall of the UK, very easy.
Thanks for the insight Ryan, it’s been sorely missed! Not to say that Servethehome hasn’t been trying in their own way but there has been a gap since the closing of Anandtech. I am excited for this team up, keep up the great work everyone!
This might be the most exciting Intel release to me in a long time and might finally push me to upgrade my 11th Gen I series if there are some decent ultrabook models.
In my opinion having three different kinds of cores on package is not useful even from a marketing and market segmentation point of view.
The popularity of the 8-core Ryzen 9800X3D tells me people have caught on to the type of shrink-flation that increases the core count by minimising the core size.
“In my opinion having three different kinds of cores on package is not useful even from a marketing and market segmentation point of view.”
It should be largely invisible to the users. AMD has handled it well by putting lower clocking cores with identical instruction sets/IPC in Strix/Krackan Point, although the division of L3 cache is questionable.
In the future, AMD may adopt 2c/4t of Zen 6 “LP” cores in the desktop I/O die. This type of core would clearly be for improving idle power consumption, rather than increasing performance per area.
Very nicely written article!
CWF will also bring their hybrid compression bonding and, reportedly, 576MB of SRAM on the base tiles. Then NVL will, reportedly, also add SRAM on the base tiles. If they can pull off all these updates within one year, it will be long remembered.