HomeHot Chips 2026 XCENA MX1 CXL Slide 9 More throughput at lower power – analytics kernels

Hot Chips 2026 XCENA MX1 CXL Slide 9 More throughput at lower power – analytics kernels

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Hot Chips 2026 XCENA MX1 CXL Slide 8 PXL: a MapReduce-style runtime for the MUs
Hot Chips 2026 XCENA MX1 CXL Slide 10 Presenting SSD capacity as byte-addressable CXL memory
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